About Andes Technology As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is driving the global adoption of RISC-V. Andes’ extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices. Over 15 billion Andes-powered SoCs are driving innovations globally.
Andes Technology has played a central role in enhancing RISC-V security standards, having chaired RISC-V International’s IOPMP (IO Physical Memory Protection) task group and co-chaired the TEE (Trusted Execution Environment) task group. These efforts resulted in the IOPMP specification that provides the hardware isolation mechanisms needed to secure hardware, as well as a secure monitor and TEE to use this hardware to allow OS and applications to run protected from each other and malicious code.
"ProvenRun offers the most secure TEE and OS on the market today for ARM and now RISC-V architectures,” said Thierry Chesnais, ProvenRun CEO. "Andes leadership in RISC-V security task groups and broad portfolio of RISC-V IP, makes them a natural partner to deploy ProvenCore for highly secure environments.” "Andes RISC-V IOPMP IPs bring unique and competitive security advantages to our customers using RISC-V processors," said Samuel Chiang, marketing director of Andes Technology.
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